Timing diagram

2)What is the purpose of this circuit, and the role ofS1, S0 and EN?

When the enable switch is “high” the purpose of this circuit is to activate respectively the first, the second, the third and the fourth AND gate through S1 and S0 selectors; while when the enable switch is “

low” all AND gates give a low level independently from S1 and S0 selectors.

S1 and S0 combinations are the responsible of the gate selection (if S0 and S1 are respectively “0” so only the first AND gate gives “1”; if S0 and S1 are respectively “0”and “1”only the second AND gate gives “1” and so on…)

This circuit is a sort of decoder with an enable switch.