Analisi degli stati possibili di un circuito sequenziale sincrono
1) Schematic
2) Timing diagram showing all the network states
The clear is so short because, if it were low, all the quits would be low.
3) How many different configurations are actually possible? What are the possible state-codes (Q2,Q1,Q0)?
0 0 0; 1 0 0;1 1 1 ;0 1 1.
4) Which are the ones (if any) that will never show up (Q2,Q1,Q0)?
1 0 1; 1 1 0; 0 1 0; 0 0 1